| Shelfclass_id | 3.H |
| Sortkey | LARUS, JAMES R |
| Authors | James R. Larus, Ravi Rajwar |
| Title | Transactional Memory |
| Publisher | Morgan & Claypool Publishers |
| Edition | 1st ed. |
| Year | 2007 |
| Languages | eng |
| Isbn | 1598291246, 9781598291247 |
| Series | Synthesis Lectures on Computer Architecture |
| Volume | 2 |
| Issn | 1935-3235 |
| Description | xiii, 211 p. ill. 24 cm. |
| Record date | 20080808 |
| Location | [San Rafael, Calif.] |
| Keywords | Transaction systems (Computer systems), Threads (Computer programs), Synchronization, Parallel programming (Computer science) |
| Notes | 2nd edition (2010) of the book also in the library. |